Volume 32 Issue 2
Mar.  2012
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MA Yin, AN Junshe, WANG Lianguo, SUN Wei. SEU-tolerant System Design of SRAM FPGA Based on Scrubbing in Aerospace[J]. Journal of Space Science, 2012, 32(2): 270-276. doi: 10.11728/cjss2012.02.270
Citation: MA Yin, AN Junshe, WANG Lianguo, SUN Wei. SEU-tolerant System Design of SRAM FPGA Based on Scrubbing in Aerospace[J]. Journal of Space Science, 2012, 32(2): 270-276. doi: 10.11728/cjss2012.02.270

SEU-tolerant System Design of SRAM FPGA Based on Scrubbing in Aerospace

doi: 10.11728/cjss2012.02.270
  • Received Date: 2011-01-04
  • Rev Recd Date: 2011-10-28
  • Publish Date: 2012-03-15
  • Aerospace and extra-terrestrial applications on SRAM FPGA are sensitive to SEU which might result in information loss or functional interruption. In this paper, a detailed introduction to TMR and Scrubbing, which are the significant techniques of this design, was given; then, a highly reliable fault-tolerant system based on TMR, Scrubbing and Reload rules was implemented. An anti-fuse FPGA periodically scrubbed the configuration bitstream of SRAM FPGA in milliseconds level, and both FPGAs implemented triple module design redundancy. This fault-olerant design has been adopted in an actual spacecraft electronic system, which can make reference to the design of highly reliable electronic systems.

     

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