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• 空间探测技术 • Previous Articles     Next Articles

SEU-tolerant System Design of SRAM FPGA Based on Scrubbing in Aerospace

MA Yin1,2, AN Junshe1, WANG Lianguo1, SUN Wei1   

  1. 1. Center for Space Science and Applied Research, Chinese Academy of Sciences, Beijing 100190;
    2. Chinese Academy of Space Technology, Beijing 100094
  • Received:2011-01-04 Revised:2011-10-28 Online:2012-03-15 Published:2012-03-15

Abstract: Aerospace and extra-terrestrial applications on SRAM FPGA are sensitive to SEU which might result in information loss or functional interruption. In this paper, a detailed introduction to TMR and Scrubbing, which are the significant techniques of this design, was given; then, a highly reliable fault-tolerant system based on TMR, Scrubbing and Reload rules was implemented. An anti-fuse FPGA periodically scrubbed the configuration bitstream of SRAM FPGA in milliseconds level, and both FPGAs implemented triple module design redundancy. This fault-olerant design has been adopted in an actual spacecraft electronic system, which can make reference to the design of highly reliable electronic systems.

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